A method for decreasing the loss in substrate integrated waveguide (SIW) structures is introduced. In this method, the dielectric substrate is partially removed. Accordingly, dielectric loss reduction has been explicated analytically. Its equivalence to the rectangular waveguide of solid walls which is partially filled with dielectric has been identified. A novel topology for demonstrating the idea is established and a low loss three port substrate integrated waveguide power divider is presented. This SIW power divider shows lower loss than conventional SIW power dividers. Proper TRL standards are realized for removing the effect of transition and/or matching sections in measurement process. For a low-loss three-port PSIW power divider, the return loss below 10 dB and transmission coefficients between -3 dB to -3.5 dB from 8.75 GHz to 10 GHz have been achieved. The measured amplitude imbalance is less than ±0.2 dB, and the measured phase difference between <S21 and <S31 is about 40 in the same frequency band.
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